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1

Energy Efficient System-on-chip Design for Wireless Body Area Sensor Network

Kao, Chi-Chou, Yang, Wen-Lin

Journal:

Electric Power Components and Systems

Year:

2014

Language:

english

File:

PDF, 375 KB

english, 2014

2

[IEEE TENCON 2008 - 2008 IEEE Region 10 Conference (TENCON) - Hyderabad, India (2008.11.19-2008.11.21)] TENCON 2008 - 2008 IEEE Region 10 Conference - A simple scheme to extend the linearity of the continuous-time CMFB circuit for fully-differential amplifier

Hung-Yi Lin,, Yen-Tai Lai,, Chi-Chou Kao,

Year:

2008

Language:

english

File:

PDF, 254 KB

english, 2008

3

BDD-based synthesis for mixed CMOS/PTL logic

Journal:

International Journal of Circuit Theory and Applications

Year:

2011

Language:

english

File:

PDF, 104 KB

english, 2011

4

[IEEE 2009 IEEE International Symposium on Circuits and Systems - ISCAS 2009 - Taipei, Taiwan (2009.05.24-2009.05.27)] 2009 IEEE International Symposium on Circuits and Systems - A novel digital pixel sensor system

Lai, Yen-Tai, Yeh, Chia-Nan, Kao, Chi-Chou

Year:

2009

Language:

english

File:

PDF, 805 KB

english, 2009

5

[IEEE Conference of Asia and South Pacific Design Automation 2003 - Kitakyushu, Japan (21-24 Jan. 2003)] Proceedings of the ASP-DAC Asia and South Pacific Design Automation Conference, 2003. - A technology mapping algorithm for heterogeneous FPGAs

Chi-Chou Kao,, Yen-Tai Lai,

Year:

2003

Language:

english

File:

PDF, 419 KB

english, 2003

6

[IEEE ASP-DAC 2004: Asia and South Pacific Design Automation Conference 2004 - Yohohama, Japan (27-30 Jan. 2004)] ASP-DAC 2004: Asia and South Pacific Design Automation Conference 2004 (IEEE Cat. No.04EX753) - Area-minimal algorithm for LUT-based FPGA technology mapping with duplication-free restriction

Chi-Chou Kao,, Yen-Tai Lai,

Year:

2004

Language:

english

File:

PDF, 445 KB

english, 2004

7

An efficient algorithm for finding the minimal-area FPGA technology mapping

Kao, Chi-Chou, Lai, Yen-Tai

Journal:

ACM Transactions on Design Automation of Electronic Systems

Year:

2005

Language:

english

File:

PDF, 226 KB

english, 2005

8

A HIGH FLEXIBILITY DESIGN FOR CLOCK DISTRIBUTION NETWORK IN SYSTEM ON CHIP

Journal:

Journal of Circuits System and Computers

Year:

2007

Language:

english

File:

PDF, 241 KB

english, 2007

9

Performance-driven parallel reconfigurable computing architecture for multi-standard video decoding

Journal:

Multimedia Tools and Applications

Year:

2020

File:

PDF, 1.16 MB

2020

10

Apple polyphenol inhibits colon carcinoma metastasis via disrupting Snail binding to focal adhesion kinase

Hung, Chia-Hung, Huang, Chi-Chou, Hsu, Li-Sung, Kao, Shao-Hsuan, Wang, Chau-Jong

Journal:

Journal of Functional Foods

Year:

2015

Language:

english

File:

PDF, 4.30 MB

english, 2015

11

Performance-Oriented Partitioning for Task Scheduling of Parallel Reconfigurable Architectures

Journal:

IEEE Transactions on Parallel and Distributed Systems

Year:

2015

Language:

english

File:

PDF, 721 KB

english, 2015

12

FDG PET/CT Images Demonstrating Fournier Gangrene With Bilateral Pelvic Muscle Extension in a Patient With Recurrent Rectosigmoid Cancer

Hsu, Chia-Tien, Kao, Pan-Fu, Huang, Chi-Chou, Huang, Hsin-Hui, Lee, Jong-Kang

Journal:

Clinical Nuclear Medicine

Year:

2014

Language:

english

File:

PDF, 673 KB

english, 2014

13

[IEEE 2012 7th International ICST Conference on Communications and Networking in China (CHINACOM 2012) - Kun Ming (2012.08.8-2012.08.10)] 7th International Conference on Communications and Networking in China - Laplacian-based H.264 intra-prediction mode decision

Chi-Chou Kao,, Yen-Tai Lai,, Chao-Feng Tseng,

Year:

2012

Language:

english

File:

PDF, 361 KB

english, 2012

14

Clock Skew Minimization in Multiple Dynamic Supply Voltage with Adjustable Delay Buffers Restriction

Journal:

Journal of Signal Processing Systems

Year:

2015

Language:

english

File:

PDF, 749 KB

english, 2015

15

[IEEE ISCAS'99. 1999 IEEE International Symposium on Circuits and Systems. VLSI - Orlando, FL, USA (30 May-2 June 1999)] ISCAS'99. Proceedings of the 1999 IEEE International Symposium on Circuits and Systems VLSI (Cat. No.99CH36349) - A quadratic programming method for interconnection crosstalk minimization

Yen-Tai Lai,, Chi-Chou Kao,, Wu-Chien Shieh,

Year:

1999

Language:

english

File:

PDF, 308 KB

english, 1999

16

LOW-ENERGY CLUSTER HEAD SELECTION FOR CLUSTERING COMMUNICATION PROTOCOLS IN WIRELESS SENSOR NETWORK

Kao, Chi-Chou, Yeh, Chia-Nan, Lai, Yen-Tai

Journal:

International Journal of Computers and Applications

Year:

2011

Language:

english

File:

PDF, 1.16 MB

english, 2011

17

Design and Implementation of Stereoscopic Image Generation

Journal:

Journal of Circuits System and Computers

Year:

2019

Language:

english

File:

PDF, 1.09 MB

english, 2019

18

[ACM Press the 2003 conference - Kitakyushu, Japan (2003.01.21-2003.01.24)] Proceedings of the 2003 conference on Asia South Pacific design automation - ASPDAC - A technology mapping algorithm for heterogeneous FPGAs

Kao, Chi-Chou, Lai, Yen-Tai

Year:

2003

Language:

english

File:

PDF, 324 KB

english, 2003

19

An efficient reflection invariance region-based image retrieval framework

Chi-Chou Kao, Yen-Tai Lai, Chia-Hui Lin

Journal:

International Journal of Imaging Systems and Technology

Year:

2010

Language:

english

File:

PDF, 787 KB

english, 2010

20

[IEEE 2007 5th International Conference on Communications, Circuits and Systems - Kokura (2007.07.11-2007.07.13)] 2007 International Conference on Communications, Circuits and Systems - A Novel Flash A/D Converter with Ultra Short Latency and High Bubble Error Tolerance

Chia-Nan Yeh,, Yen-Tai Lai,, Chi-Chou Kao,

Year:

2007

Language:

english

File:

PDF, 4.35 MB

english, 2007

21

[IEEE The 2004 IEEE Asia-Pacific Conference on Circuits and Systems, 2004. - Tainan, Taiwan (Dec. 6-9, 2004)] The 2004 IEEE Asia-Pacific Conference on Circuits and Systems, 2004. Proceedings. - DTA: layout design tool for CMOS analog circuit

Yen-Tai Lai,, Yung-Chuan Jiang,, Chi-Chou Kao,

Year:

2004

Language:

english

File:

PDF, 309 KB

english, 2004

22

[IEEE ISCAS'99. 1999 IEEE International Symposium on Circuits and Systems. VLSI - Orlando, FL, USA (30 May-2 June 1999)] ISCAS'99. Proceedings of the 1999 IEEE International Symposium on Circuits and Systems VLSI (Cat. No.99CH36349) - A routability and performance driven technology mapping algorithm for LUT based FPGA designs

Chi-Chou Kao,, Yen-Tai Lai,

Year:

1999

Language:

english

File:

PDF, 434 KB

english, 1999

23

An optimisation communication cost algorithm for dynamically reconfigurable FPGAs

Kao, Chi-Chou, Tai, Tzu-Chiang, Lai, Yen-Tai

Journal:

International Journal of Electronics

Year:

2010

Language:

english

File:

PDF, 167 KB

english, 2010

24

[IEEE 2007 5th International Conference on Communications, Circuits and Systems - Kokura (2007.07.11-2007.07.13)] 2007 International Conference on Communications, Circuits and Systems - A Sequential Circuit Partitioning Algorithm for Dynamically Reconfigurable FPGAs

Chi-Chou Kao,, Tzu-Chiang Tai,, Yun-Yi Hwang,, Yen-Tai Lai,

Year:

2007

Language:

english

File:

PDF, 3.66 MB

english, 2007

25

[IEEE ISCAS '98 1998 IEEE International Symposium on Circuits and Systems - Monterey, CA, USA (31 May-3 June 1998)] ISCAS '98. Proceedings of the 1998 IEEE International Symposium on Circuits and Systems (Cat. No.98CH36187) - A field programmable gate array chip with hierarchical interconnection structure

Yen-Tai Lai,, Chi-Chou Kao,, Tsun-Cheng Chang,, Kun-Nern Chen,

Year:

1998

Language:

english

File:

PDF, 331 KB

english, 1998

26

Designs of Low Power Snoop for Multiprocessor System on Chip

Kao, Chi-Chou, Lin, Yi-Ciang

Journal:

Journal of Signal Processing Systems

Year:

2017

Language:

english

File:

PDF, 618 KB

english, 2017

27

Design of echo cancellation and noise elimination for speech enhancement

Journal:

IEEE Transactions on Consumer Electronics

Year:

2003

Language:

english

File:

PDF, 607 KB

english, 2003

28

[IEEE 2013 International Symposium on Biometrics and Security Technologies (ISBAST) - Chengdu, Sichuan, China (2013.07.2-2013.07.5)] 2013 International Symposium on Biometrics and Security Technologies - E-Health Design of EEG Signal Classification for Epilepsy Diagnosis

Year:

2013

Language:

english

File:

PDF, 930 KB

english, 2013

29

IMPROVED TIME-MULTIPLEXED FPGA ARCHITECTURE AND ALGORITHM FOR MINIMIZING COMMUNICATION COST DESIGNS

KAO, CHI-CHOU, LAI, YEN-TAI

Journal:

Journal of Circuits System and Computers

Year:

2013

Language:

english

File:

PDF, 383 KB

english, 2013

30

[IEEE 2007 5th International Conference on Communications, Circuits and Systems - Kokura (2007.07.11-2007.07.13)] 2007 International Conference on Communications, Circuits and Systems - Crosstalk Minimization Method for System-on-Chip

Year:

2007

Language:

english

File:

PDF, 3.29 MB

english, 2007

31

[IEEE 2013 2nd International Symposium on Next-Generation Electronics (ISNE 2013) - Kaohsiung (2013.2.25-2013.2.26)] 2013 International Symposium on Next-Generation Electronics - Clock skew minimization with adjustable delay buffers restriction

Chi-Chou Kao,, Kun-Cte Lin,

Year:

2013

Language:

english

File:

PDF, 439 KB

english, 2013

32

[IEEE 2007 5th International Conference on Communications, Circuits and Systems - Kokura (2007.07.11-2007.07.13)] 2007 International Conference on Communications, Circuits and Systems - A new cluster head assignment algorithm for low energy clustering communication protocols in wireless sensor network

Chi-Chou Kao,, Chia-Nan Yeh,, Yen-Tai Lai,, Tang-Wei Liao,

Year:

2007

Language:

english

File:

PDF, 838 KB

english, 2007

33

Hibiscus sabdariffa polyphenol-enriched extract inhibits colon carcinoma metastasis associating with FAK and CD44/c-MET signaling

Huang, Chi-Chou, Hung, Chia-Hung, Chen, Ching-Chun, Kao, Shao-Hsuan, Wang, Chau-Jong

Journal:

Journal of Functional Foods

Year:

2018

Language:

english

File:

PDF, 2.35 MB

english, 2018

34

Stereoscopic image generation with depth image based rendering

Journal:

Multimedia Tools and Applications

Year:

2017

Language:

english

File:

PDF, 2.91 MB

english, 2017

35

High-performance CORDIC rotation algorithm based on look-ahead techniques

Journal:

International Journal of Electronics

Year:

2011

Language:

english

File:

PDF, 352 KB

english, 2011

36

Interface circuit synthesis of system-on-chip

Journal:

International Journal of Electronics

Year:

2012

Language:

english

File:

PDF, 487 KB

english, 2012

37

[IEEE 1999 IEEE Workshop on Signal Processing Systems. SiPS 99. Design and Implementation - Taipei, Taiwan (20-22 Oct. 1999)] 1999 IEEE Workshop on Signal Processing Systems. SiPS 99. Design and Implementation (Cat. No.99TH8461) - Design and implementation of an adaptive FIR filter based on delayed error LMS algorithm

Yen-Tai Lai,, Chi-Chou Kao,, Hao-Jan Chen,

Year:

1999

Language:

english

File:

PDF, 290 KB

english, 1999

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